Flash Translation layer(FTL): Difference between revisions
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<h2>Contents <a href="javascript:void(0);" class="hide-link" onclick="toggleTOC()">[hide]</a></h2> | <h2>Contents <a href="javascript:void(0);" class="hide-link" onclick="toggleTOC()">[hide]</a></h2> | ||
<ul> | <ul> | ||
<li><a href="#section1">Background information</a></li> | |||
<li><a href="#section3"> Flow chart of order of operations</a></li> | <li><a href="#section3"> Flow chart of order of operations</a></li> | ||
<li><a href="#section5"> Related Topics</a></li> | <li><a href="#section5"> Related Topics</a></li> | ||
<li><a href="#section6"> Further reading</a></li> | <li><a href="#section6"> Further reading</a></li> | ||
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</div> | </div> | ||
<h1> Background information </h1> | <h1 id="section1" >Background information </h1> | ||
<p> | <p> The Flash Translation Layer acts as the name suggests a translation layer between the physical NAND chips and the digital operating system that runs from them.</br> | ||
<br> | The following pages of this segment go into deeper detail of each aspect of the FTL, but an overview of each aspect are as follows | ||
<ul> | <ul> | ||
<li>1. | <li>Block Mapping - Is responsible for mapping the digital data to the physical location on the chip dies | ||
<li> | </br> since there is not always (if ever) 1:1 relation to where data is stored digitally and where it is stored physically.</li> | ||
<li> | <li>Wear Levelling-Due to the nature of how NAND functions, each cell within the chip has a limited lifespan, | ||
< | </br> wear levelling prevent excessive wear on certain areas</li> | ||
< | <li>Bad Block Management - Once an area does have excess wear or simply does not function correctly | ||
</br>It's located is noted by the FTL and not used with the digital addresses being relocated to a healthy area of the storage</li> | |||
<li>Garbage collection- as the name suggests, this aspect is responsible for clearing blocks that have previously been written too | |||
</br> but are now unused. Or need to store different information.</li> | |||
<li>Block Reclamation- is responsible for moving blocks back to the list of available space after Garbage collection has erased them</li> | |||
<h1 id="section3">Flow chart of order of operations</h1> | <h1 id="section3">Flow chart of order of operations</h1> | ||
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<p>Topics such as desoldering to chip off or firmware dumping for disk PCB repairs</p> | <p>Topics such as desoldering to chip off or firmware dumping for disk PCB repairs</p> | ||
<ul> | <ul> | ||
<li><a href=" | <li><a href="https://datarecoverywiki.com/index.php/Block_Mapping">Block mapping</a></li> | ||
<li><a href=" | <li><a href="https://datarecoverywiki.com/index.php/Wear_Levelling">Wear levelling</a></li> | ||
<li><a href="https://datarecoverywiki.com/index.php/Bad_Block_Management">Bad block management</a></li> | |||
<li><a href="https://datarecoverywiki.com/index.php/Garbage_collection">Garbage collection</a></li> | |||
<li><a href="https://datarecoverywiki.com/index.php/Block_Reclamation">Block reclamation</a></li> | |||
</ul> | </ul> | ||
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<div class="reference-list"> | <div class="reference-list"> | ||
<ol> | <ol> | ||
<li>Reference 1: <a href=" | <li>Reference 1: <a href="https://www.adreca.net/NAND-Flash-Data-Recovery-Cookbook.pdf">NAND flash data recovery cookbook (free)</a></li> | ||
<li>Reference 2: <a href=" | <li>Reference 2: <a href="https://www.gchandbook.org/editions.html">The Garbage Collection Handbook: The Art of Automatic Memory Management, 2nd Edition (paid)</a></li> | ||
</ol> | </ol> | ||
</div> | </div> | ||
Latest revision as of 13:35, 10 March 2025
Background information
The Flash Translation Layer acts as the name suggests a translation layer between the physical NAND chips and the digital operating system that runs from them.
The following pages of this segment go into deeper detail of each aspect of the FTL, but an overview of each aspect are as follows
- Block Mapping - Is responsible for mapping the digital data to the physical location on the chip dies
since there is not always (if ever) 1:1 relation to where data is stored digitally and where it is stored physically. - Wear Levelling-Due to the nature of how NAND functions, each cell within the chip has a limited lifespan,
wear levelling prevent excessive wear on certain areas - Bad Block Management - Once an area does have excess wear or simply does not function correctly
It's located is noted by the FTL and not used with the digital addresses being relocated to a healthy area of the storage - Garbage collection- as the name suggests, this aspect is responsible for clearing blocks that have previously been written too
but are now unused. Or need to store different information. - Block Reclamation- is responsible for moving blocks back to the list of available space after Garbage collection has erased them
Flow chart of order of operations
Insert a flow chart of steps and actions for each task (create using diagram)
Troubleshooting/tips and tricks
Fixes to any common issues that were encountered or could be easily encountered
Related Topics
Topics such as desoldering to chip off or firmware dumping for disk PCB repairs
Further reading
External references in wiki references can just be cited through the keyword link