Wear Levelling
Background information
Wear levelling algorithms are responsible for extending the life of the individual cells within a NAND chip.
By ensuring that cells on the chip are equalled used so the damaged caused by read and writing processes is spread equally across the entire chip
and one area does not wear out sooner than another or become unreliable to the point of random data loss. There are three main forms of wear levelling algorithms
- Dynamic
- Static
- Full aware translation filter(FAT filter)
Dynamic wear levelling works by focusing on actively written blocks at the time of the update/write since it ensured the data is written to a block with the current lowest program/erase(P/E) counter
in other words dynamic writes to the least used block at the moment of updating/writing, while this is great for frequently accessed data, it can have major issues with areas which aren't frequently accessed
as dynamic wear levelling simply ignores those parts in an effort to speed itself up, this can cause issues such as uneven wearing of certain cells compared to the actively used cells which reduces the overall
lifetime of the storage.
Static wear levelling functions by moving infrequently accessed data from physical blocks to different blocks periodically (insert time frame here)
to ensure that blocks do not develop uneven wear, which could shorten the overall lifespan of the NAND chip as a whole.
Fully aware translation filter(FAT filter) is a combination of both Dynamic and Static. As this style can handle both active and inactive physical blocks through real time assessments of the P/E counter
that allows the FAT filter to distribute data evenly across the chip or chips to prevent uneven wear of its cells regardless if the area is active or inactive.
Due to FATs knowledge of the data stored It uses that knowledge to improve the chips lifespan and performance by reducing the amount of writing to more worn areas by grouping active data together
then placing the data in less worn areas.,
while placing data that is inactive in more worn areas, in an attempt to level out the wear on the cells themselves. In a process often referred to as intelligent block selection
This awareness also allows for the FAT filter to adjust its needs in real time depending on the state of the drive and the workload is it currently under.
FAT also implements garbage collection (tag it) as a way to ensure that the block reclamation (tag it) process does not wear one particular area out and balances the wear around the chip as a whole.
Flow chart of order of operations
Insert a flow chart of steps and actions for each task (create using diagram)
Related Topics
Topics such as desoldering to chip off or firmware dumping for disk PCB repairs
Further reading
External references in wiki references can just be cited through the keyword link
- Reference 1: Source details
- Reference 2: Source details